dr hab. Zbigniew Kokosiński, prof. PK

Zbigniew Kokosinski - Cracow University of Technology

Background Data

Zbigniew Kokosiński was born and educated in Cracow, Poland.

An adherent of the "Solidarity" movement in Poland, in 1980-1982; member of NZS (Independent Student Association), member of NZS university council, chair of culture council.

After graduation from Politechnika Krakowska (CUT) in 1982 he was employed in the Institute of Electrical Eng. and Electronics,

Zbigniew Kokosinski received PhD degree with distinction (1992) and DSc degree (2019), both in Computer Science, from Gdansk University of Technology, Poland.

From 1994 to 1997 he worked as an Assistant Professor in The University of Aizu, Aizu-Wakamatsu, Japan. He was a member of Mathematical Foundation of Computer Science Laboratory at the Department of Computer Software.

Currently he is employed as a Professor and Head at the Department of Automatic Control and Computer Engineering, Faculty of Electrical and Computer Eng., Cracow University of Technology, Cracow .

He published over 50 refered papers in scientific journals and conference proceedings, chapters in books, and also was granted 2 patents for digital circuitry design.

Editor of International J. of Computing. Since 2018 NAWA expert. Reviews for Information Sciences, J. of Parallel and Distributed Computing, The Computer J., Parallel Computing, Parallel Processing Letters, Networks, Optimization, Lecture Notes in Computer Science, ACM J. of Experimental Algorithmics, J. of Circuits, Systems and Computers, Microelectronics, Journal of King Saud University - Computer and Information Sciences, Algorithms, Computing, Processes, Symmetry, Theory of Computing Systems, J. of Mathematical Modeling and Algorithms, Kragujevac J. of Mathematics, Studia Informatica, J. of Telecommunications and Information Technology etc.

Prof. Kokosinski participated in organization of many international conferences in the area of computing as conference co-chair, a program committee member, referee, session chair etc. (PDCS, ICEC, IPPS, PDPTA, PPAM, FPL, PARELEC, MCCSIS, ISPDC, ICACIT, ICAISC, FedCSIS, Future Computing, iCAST, SCET, IDAACS, REM, ICOTL).

Present membership: SBS. Past professional memberships: IPSJ, IEEE CS, ACM and IASTED.

Biographical notes in : Marquis "Who's Who in Science and Engineering" (9th ed., 2007), Huebners "Who is Who w Polsce" (since 6th ed., 2007)

Research Interests

  • Parallel processors and algorithms
  • Combinatorial optimization and parallel metaheuristics
  • Artificial intelligence
  • Programmable devices and systems
  • Generation of combinatorial configurations
  • Numerical function approximation

Profiles

Research Description

Design of a new problem-oriented hardware and a specialized software is now of growing interest since parallelization of computations became widely accepted in many application areas in which reducing the total computation time is a key factor.

New processor architectures can speed up operations which are essential for given classes of applications. For instance, in parallel solving of various combinatorial problems, parallel generation of combinatorial objects as problem instances is often required. Therefore, specialized procesors copying with this class of problems need fast hardware generators of basic combinatorial configurations, like permutations, combinations, partitions, trees, etc.

Many sequential and parallel algorithms for generation of combinatorial objects were developed in various low level models of parallel computations (associative, network, linear array, complex parallel counter etc.), sometimes with new representations and in new linear orders. In addition ranking and fast unranking algorithms for many classes of combinatorial objects were designed mostly on the basis of dynamic programming paradigm. They can be used for splitting the whole set to be generated into subsets and thus enabling parallel generation on the set level, for sequential/parallel random generation, etc. I designed several versatile, programmable hardware generators of permutations, derangements, combinations and partitions suitable for FPGA/ASIC implementation, which can be applied for fast mask and pattern generation in associative processors.

Among fast parallel processors speeding up computations dominated by relational algebra operations, an interesting proposition is an associative processor with multi-comparand multi-search operations in which processing time does not depends on the sizes of comparand and data sets, but it is a function of the constant word size. Two FPGA-implementations of such specialized processors with built-in set of logical operators were developed for the first time in 2002 and 2008. The associative graph processor (AGP) is one of the core applications of such processor architecture.

Important research area is developing parallel metaheuristics for solving hard combinatorial optimization problems, like graph coloring, scheduling, TSP etc. For the graph coloring problem (GCP) parallel metaheuristics (PGA and PSA) were developed for the first time. They were tested on DIMACS graph coloring instances. Later PGA was used for solving graph coloring sum problem (GCS). The related publication with some theoretical and experimental results initialized research on using metaheuristics and other techniques to improve upper bounds on chromatic sum and chromatic sum number. For many DIMACS graph coloring instances the exact values of those parameters were found. Another interesting research is related to the robust graph coloring problem (RGCP). The original problem statement was reformulated in order to make it practical for robust system designers and then tested on special DIMACS-derived and random graph instances. Many developed metaheuristic introduced new operators and hybridization techniques.

On the basis of theoretical results obtained at Cracow University of Technology by prof. Adam Kapralski (1948-2010) an academic software tool "PKmin" for synthesis and functional decomposition of combinational logic circuits was developed and is freely available for researchers and students.

Research Projects

In Japan I was conducting the research project "Processing combinatorial problems in parallel" (1994-1997). At Cracow University of Technology I was granted research projects "Processing of combinatorial problems in associative processors" (1998-2000), "Combinatorial Algorithms for Parallel Systems" (2002-2005). "Applications of combinatorial object generators and iterative algorithms in combinatorial optimization" (2007-2008), "Parallel metaheuristics in combinatorial optimization: partitioning problems" (2016).

Research projects conducted at Cracow University of Technology are listed in: Polish Science Database (in Polish).

Selected Publications

(section includes copyrighted material)
  • Kokosiński Z., Gepner P., Moroz L., Samotyy V., Węgrzyn M., Gavkalova N.: Fast and accurate approximation algorithms for computing floating point square root, Numerical Algorithms, published online 2 Oct.2024, DOI: 10.1007/s11075-024-01932-7,
  • Kokosiński Z., Szydłowski P.: Rough inference system for automated failure prediction in cooling devices, Proc. 1st International Conference on Optimization Techniques for Learning (ICOTL’2023), 7-8 December 2023, Bengaluru, India, pp. 1-5, IEEE, ISBN 979-8-3503-2804-2, DOI: 10.1109/icotl59758.2023.10435298
  • Moroz L., Samotyy V., Kokosiński Z., Gepner P.: Simple multi precision algorithms for exponential functions, IEEE Signal Processing Magazine , Vol. 39 (2022), No.4, 130-137, DOI: 10.1109/MSP.2022.3157460,
  • Kokosiński Z., Jaworski K.: A rough inference software system for computer-assisted reasoning, [in:] Virvou M., Tsihrintzis G.A., Tsoukalas L.H., Jain L.C. (eds), Advances in Artificial Intelligence-based Technologies. Selected Papers in Honour of Professor Nikolaos G. Bourbakis , Vol.1, Ch.5., pp. 59-76, Springer (2022), ISBN: 978-3-030-80570-8, DOI: 10.1007/978-3-030-80571-5
  • Kokosiński Z.: Extraction of nonredundant information from sensor networks, Proc. 11th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications (IDAACS’2021), Cracow, Poland, Vol.1, pp. 403-407, (2021), DOI: 10.1109/IDAACS53288.2021.9660929
  • Kokosiński Z.: Hybrid algorithms for Minimum Base Problem, Int. J. Computer Science and Network Security, Vol. 20, No. 10, pp. 158-162 (2020) DOI: 10.22937/IJCSNS.2020.20.10.21
  • Popenko V., Sperkach M., Zhdanova O., Kokosiński Z.: On optimality conditions for job scheduling on uniform parallel machines, [in:] Hu Z., Petoukhov S., Dychka I., He M. (eds.): Advances in Computer Science for Engineering and Education II ICCSEEA 2019, Advances in Intelligent Systems and Computing , Vol. 938, pp. 103-112, Springer (2020), ISBN: 978-3-030-16620-5, DOI: 10.1007/978-3-030-16621-2_10
    Electronic version: draft PDF
  • Kokosiński Z.: Digital data conversion using content addressable memory, Proc. 10th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications (IDAACS’2019), Metz, France, Vol. 2, pp. 680-684, (2019) ISBN: 978-1-7281-4069-8, DOI: 10.1109/IDAACS.2019.8924304
  • Kokosiński Z., Pijanowski M.: Application of parallel and hybrid metaheuristics for graph partitioning problem, Proc. 9th International Conference "Numerical Methods and Applications" NMA 2018, Borovets, Bulgaria, [in:] Lecture Notes in Computer Science, Revised Papers, Vol. 11189, pp. 125-132, Springer Nature Switzerland AG (2019), DOI: , 10.1007/978-3-030-10692-8_14
  • Kokosiński Z., Bała M.: Solving graph partitioning problems with parallel metaheuristics, [in:] Fidanova S. (ed.): Recent Advances in Computational Optimization, Studies in Computational Intelligence, Vol. 717, pp. 89-105, Springer International Publishing (2018), ISBN: 978-3-319-59860-4, DOI: 10.1007/978-3-319-59861-1_6
  • Kokosiński Z.: On generation of permutations of m out of n items, Information Processing Letters, Vol. 124, pp. 1-5 (2017) DOI: 10.1016/j.ipl.2017.04.001
  • Michalski T., Kokosiński Z.: Functional decomposition of combinational logic circuits with PKmin, Technical Transactions, 2-E/2016, pp. 191-202, (2016)
    Electronic version: abstract PDF
  • Kokosiński Z., Ochał Ł., Chrząszcz G.: Parallel metaheuristics for robust graph coloring problem, [in:] Fidanova S. (ed.): Recent Advances in Computational Optimization, Studies in Computational Intelligence , Vol. 655, pp. 285-302, Springer International Publishing (2016), ISBN: 978-3-319-40131-7
    Electronic version: abstract
  • Chakraborty G., Horie S., Yokoha H., Kokosiński Z.: Minimizing sensors for system monitoring - a case study with EEG signals, Proc. 2015 IEEE 2nd International Conference on Cybernetics (CYBCONF), 24-26 June 2015, Gdynia, Poland, pp. 206-211, (2015)
    Electronic version: abstract
  • Kokosiński Z., Domagała P.: Solving graph coloring problem with parallel evolutionary algorithms in a mesh model, Annals of Computer Science and Information Systems, PTI, Vol.3, pp. 21-28, (2014)
    Electronic version: abstract
  • Kokosiński Z.: A parallel dynamic programming algorithm for unranking set partitions, Technical Transactions, 3-AC/2013, pp. 29-38 (2013)
    Electronic version: PDF
  • Kokosiński Z., Wójcik S.: A comparison of SW/HW implementations of stream cipher encoders, Technical Transactions, 3-AC/2013, pp. 83-92 (2013)
    Electronic version: abstract PDF
  • Kokosiński Z.: Parallel metaheuristics in graph coloring, VNULP - Kompiuterni nauki ta informacijni technologii , No. 744 , 209-214 (2012)
    Electronic version: abstract + PDF(UA)
  • Kokosiński Z., Michalski T.: Synthesis of 2-level combinatorial circuits with PKmin, Technical Transactions, 1-AC/2012, 93-113 (2012).
    Electronic version: abstract + PDF (in Polish)
  • Kiełkowicz K., Kokosiński Z.: A hybrid algorithm for probabilistic traveling salesman problem, Technical Transactions, 1-AC/2012, pp. 115-126 (2012).
    Electronic version: abstract + PDF (in Polish)
  • Kokosiński Z.: Parallel enumeration of t-ary trees in ASC SIMD model, Int. J. Computer Science and Network Security, Vol. 11, No. 12, pp. 38-49 (2011)
    Electronic version: abstract + PDF
  • Kokosiński Z., Halesiak P.: FPGA generators of combinatorial objects in a linear array model, Proc. 7th Int. Symposium on "Parallel and Distributed Computing" ISPDC'2008, Kraków, Poland, IEEE Computer Society, pp. 223-227 (2008)
    Electronic version: abstract
  • Kokosiński Z., Malus. B.: FPGA implementations of a parallel associative processor with multi-comparand multi-search operations, Proc. 7th Int. Symposium on "Parallel and Distributed Computing" ISPDC'2008, Kraków, Poland, IEEE Computer Society, pp. 444-448 (2008)
    Electronic version: abstract
  • Kokosiński Z.: On parallel generation of partial derangements, derangements and permutations, Proc. 7th Int. Conference "Parallel Processing and Applied Mathematics" PPAM'2007, Gdansk, Poland [in:] Lecture Notes in Computer Science, Vol. 4967, pp. 219-228 (2008)
    Electronic version: abstract
  • Łukasik S., Kokosiński Z., Swiętoń G.: Parallel simulated annealing algorithm for graph coloring problem, Proc. 7th Int. Conference "Parallel Processing and Applied Mathematics" PPAM'2007, Gdansk, Poland [in:] Lecture Notes in Computer Science, Vol. 4967, pp. 229-238 (2008)
    Electronic version: abstract
  • Kokosiński Z., Studzienny Ł.: Hybrid genetic algorithms for the open-shop scheduling problem, Int. J. Computer Science and Network Security, Vol. 7, No. 9, 136-145 (2007)
    Electronic version: abstract
  • Kokosiński Z., Kwarciany K.: On sum coloring of graphs with parallel genetic algorithms, Proc. 8th Int. Conf. "Adaptive and Natural Computing Algorithms" ICANNGA'2007, Warsaw, Poland [in:] Lecture Notes in Computer Science, Vol. 4431, pp. 211-219 (2007)
    Electronic version: abstract + PDF
  • Kokosiński Z.: A new algorithm for generation of exactly m-block partitions in associative model, Proc. 6th Int. Conference "Parallel Processing and Applied Mathematics" PPAM'2005, Poznan, Poland [in:] Lecture Notes in Computer Science, Vol. 3911, pp. 67-74 (2006)
    Electronic version: abstract + PDF
  • Kokosiński Z., Kwarciany K., Kołodziej M.: Efficient graph coloring with parallel genetic algorithms, Computing and Informatics, Vol. 24, No.2, pp. 123-147 (2005),
    Electronic version: abstract + PDF
  • Kokosiński Z.: Effects of versatile crossover and mutation operators on evolutionary search in partition and permutation problems, Intelligent Information Processing and Web Mining, Proc. IIS:IIPWM'2005 Conference, Gdansk, Poland [in:] Advances in Soft Computing, Springer-Verlag, pp. 299-308 (2005)
    Electronic version: abstract + PDF
  • Bubniak G., Góralczyk M., Karp M., Kokosiński Z.: A hardware implementation of a generator of (n,k)-combinations, Proc. IFAC Workshop "Programmable Digital Systems" PDS'2004, Kraków, Poland, pp. 228-231 (2004) ISBN 83-908409-8-7
    Draft version: PDF
  • Nepomniaschaya A., Kokosiński Z.: Associative graph processor and its properties, Proc. 4th Int. Conference "Parallel Computing in Electrical Engineering" PARELEC'2004, Dresden, Germany, IEEE Computer Society, pp. 297-302 (2004)
    Electronic version: abstract + PDF
  • Kokosiński Z., Kołodziej M., Kwarciany K.: Parallel genetic algorithm for graph coloring problem Proc. 4th Int. Conference "Computational Science" ICCS'2004, Krakow, Poland [in:] Lecture Notes in Computer Science, Vol. 3036, pp. 217-224 (2004)
    Electronic version: abstract + PDF
  • Kokosiński Z.: On generation of permutations through suffix/prefix reversing in a cellular network, Proc. 5th Int. Conference "Parallel Processing and Applied Mathematics" PPAM'2003, Czestochowa, Poland [in:] Lecture Notes in Computer Science, Vol. 3019, pp. 249-254 (2004)
    Electronic version: abstract + PDF
  • Kokosiński Z.: A parallel dynamic programming algorithm for unranking t-ary trees, Proc. 5th Int. Conference "Parallel Processing and Applied Mathematics" PPAM'2003, Czestochowa, Poland [in:] Lecture Notes in Computer Science, Vol. 3019, 255-260 (2004)
    Electronic version: abstract + PDF
  • Kokosiński Z., Sikora W.: An FPGA implementation of multi-comparand multi-search associative processor, Proc. 12th Int. Conference "Field Programmable Logic and Applications" FPL'2002, Montpellier, France [in:] Lecture Notes in Computer Science, Vol. 2438, pp. 826-835 (2002)
    Electronic version: abstract + PDF
  • Kokosiński Z.: Square interconnection network for data permutation, Proc. 3rd Int. Conference "Parallel Computing in Electrical Engineering" PARELEC'2002, Warsaw, Poland, IEEE Computer Society, pp. 44-46 (2002)
    Electronic version: abstract + draft PDF
  • Kokosiński Z.: On parallel generation of t-ary trees in an associative model, Proc. 4th Int. Conference "Parallel Processing and Applied Mathematics" PPAM'2001, Naleczow, Poland [in:] Lecture Notes in Computer Science, 2328, pp. 228-235 (2002)
    Electronic version: abstract + PDF
  • Kokosiński Z.: A chromosome representation of permutations for genetic algorithms, Proc. Int. Conference "Artificial Intelligence" ICAI'99, Las Vegas, USA, CSREA, Vol.I, pp. 65-69 (1999)
  • Kokosiński Z.: On parallel generation of set partitions in associative processor architectures, Proc. 5th Int. Conference "Parallel and Distributed Processing Techniques and Applications" PDPTA'99, Las Vegas, USA, CSREA, Vol.III, pp. 1257-1262 (1999)
    Draft version: PDF
  • Kokosiński Z.: On parallel generation of combinations in associative processor architectures, Proc. Int. Conference "Parallel and Distributed Systems" Euro-PDS'97, Barcelona, Spain, IASTED, pp. 283-289 (1997)
    Draft version: PDF
  • Kokosiński Z.: An associative processor for multi-comparand parallel searching and its selected applications, Proc. 3rd Int. Conference "Parallel and Distributed Processing Techniques and Applications" PDPTA'97, Las Vegas, USA, CSREA, Vol.III, pp. 1434-1442 (1997).
    Draft version: PDF
  • Kokosiński Z.: Unranking combinations in parallel, Proc. 2nd Int. Conference "Parallel and Distributed Processing Techniques and Applications" PDPTA'96, Sunnyvale, CA, USA, CSREA, Vol.I, pp. 79-82 (1996).
    TR version: PDF
  • Kokosiński Z.: Generation of integer compositions on linear array of processors, Proc. 2nd Int. Conference "Parallel and Distributed Processing Techniques and Applications" PDPTA'96, Sunnyvale, CA, USA, CSREA, Vol.I, pp. 56-64 (1996).
    TR version: PDF
  • Kokosiński Z.: Algorithms for unranking combinations and their applications, Proc. 7th Int. Conference "Parallel and Distributed Computing and Systems" PDCS'95, Washington D.C., USA, IASTED, pp. 216-224 (1995).
    TR version: PDF
  • Kokosiński Z.: Mask and pattern generation for associative supercomputing, Proc. 12th Int. Conference "Applied Informatics" AI'94, Annecy, France, IASTED, pp. 324-326 (1994).
  • Kokosiński Z.: Simulation of parallel computations in SIMD model - a case study, Proc. 13th Int. Conference "Modeling, Identification and Control" MIC'94, Grindelwald, Switzerland, IASTED, pp. 442-445 (1994).
  • Kokosiński Z.: Circuits generating combinatorial configurations for sequential and parallel computer systems, Monografia 160, Politechnika Krakowska, 106 pp. (1993), in Polish
  • Kokosiński Z.: Iterative decomposition of permutations, Periodica Polytechnica (Hungary), Vol. 19, Nos. 1-2, pp. 49-56 (1991).
    Electronic version: abstract + PDF
  • Kokosiński Z.: On generation of permutations through decomposition of symmetric groups into cosets, BIT , Vol.30, pp. 583-591 (1990).
    Electronic version: abstract + PDF

Educational Interests

  • Combinatorial Algorithms
  • Combinatorial Optimization and Parallel Metaheuristics
  • Computational Geometry
  • Parallel Associative Processing and Processors
  • Programmable Logic Design
  • Computer Education

Teaching Description

Before 1994 at the Cracow University of Technology I was conducting lectures, exercises and lab session for the courses : "Foundations of Control Engineering", "Control Theory", "Automata Theory", "Logic Design" and some others.

In the period 1994-1997 at the University of Aizu I was involved in teaching "Computer Literacy", "Algorithms and Data Structures", "Logic Design" and the extra-curriculum student project "Generation of combinatorial objects in parallel".

At present I conduct the following courses at the Cracow University of Technology:

In March 2020 all active courses were moved to CUT e-learning platform .

In the previous years I lectured courses on:

  • Parallel and Distributed Processing
  • Information Technologies
  • Algorithms and Data Structures
  • Design and Analysis of Computer Algorithms
  • Information Processing Systems
  • Computational Complexity
  • Teaching Computer Literacy
  • Computer Control Systems
  • Programmable Logic Design
  • Programmable Digital Systems
  • Microcontroller Systems

In 1998 I established Laboratory of Programmable Digital Systems supervising its activities for over 20 years within the framework of Xilinx University Program.

I supervised about 60 theses for M.Sc.E.E., M.Sc.C.S., B.E.E.E. and B.E.C.S. degrees.

Many graduate students join my research activities and are co-autors of publications in conference proceedings and computer science journals.

Educational Projects

In 2010-2015 I was conducting an EU project at CUT within the frame of OP Human Capital with 286 student and 20 faculty participants link .

Useful Resources

Diagonal and asymmetrical chess

    ASYMMETRICAL CHESS by Zbigniew Kokosiński :
  • Chess Variant Pages: Asymmetrical chess [EN]

    Varia

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